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Lateral Power Transistors in Integrated Circuits

Chapter 1. Introduction

Technological innovation has been the key economic driving force over the last few centuries.

Chapter 2. Demand for Power Electronic Systems and Radio-Frequency Applications

This chapter deals with applications for power electronics using integrated circuits, providing intuitive access to lateral power transistors employed therein. For this purpose so-called smart-power ICs combining logic operation, memory and power electronic circuitry are presently employed. Additionally, integrated lateral power transistors are also the driving force in multi-stage RF power amplifiers (monolithic microwave integrated circuits) for base stations with a clear trend towards further incorporation of logic functionality and the implementation in the power amplifiers of mobile devices.

Chapter 3. Power Electronic and RF Amplifier Circuits

The applications mentioned in Chap. 2 require suitable power electronic circuits. This chapter transfers the application specific constraints and requirements down to the circuit and device level. Power electronic systems using integrated circuits are enabled by circuitry for energy conversion and control. Here, switch mode converters provide high efficiency, simple topology and high power densities satisfying the requirements set by the application. The benefits and drawbacks of switch-mode conversion in comparison to conventional fixed voltage regulation are explained. Moreover, the topologies for buck and boost inverters in direct current conversion and solid-state rectification as well as for power inverters using half-bridges are reviewed with respect to the application demands.

Chapter 4. Power Semiconductor Devices in Power Electronic Applications

This chapter introduced topologies for power semiconductor devices and explains the suitability of lateral power MOSFETs for implementation in integrated circuits.

Chapter 5. Modern MOS-Based Power Device Technologies in Integrated Circuits

The state-of-the-art of semiconductor device technology for LDMOS transistors in integrated circuits is introduced in this chapter.

Chapter 6. Lateral Power Transistors with Charge Compensation Patterns

Among the promising candidates for future LDMOS devices is the charge compensated LDMOS transistor which is focused on in this chapter. Charge compensation patterns have been successfully introduced in vertical superjunction MOSFETs [1]. A transfer of this topology to lateral power MOSFETs appears intriguing due to the reduction of drift resistance further beyond the one-dimensional silicon limit. Using a unit cell for lateral power MOSFETs, the charge compensation patterns are presented and their operation principle is explained. Then, different device designs for LDMOS transistors employing these charge-compensated drift regions are presented. The evaluation of electrical properties for these charge compensated LDMOS transistors yields low static power losses and reduced switching losses. The feasibility of integration of charge compensation patterns into smart-power ICs is evaluated considering the process technology required for formation of these patterns.

Chapter 7. Lateral Power Transistors with Trench Patterns

Another emerging technology which constitutes to progress beyond modern RESURF-based LDMOS transistors utilizes trench patterns. In this chapter the trench-based technology in LDMOS transistors is reviewed. First, the applicability of trench gates is motivated by a discussion on channel resistance. The impact of FinFET technology on lateral power transistors is investigated. To evaluate the feasibility of trench gates, device designs employing trench gates and their electrical properties under static and dynamic device operation are presented and discussed. Typical Figures-of-Merit obtained from these trench devices are compared to state-of-the-art LDMOS transistors. Considering the process technology, limitations for integration into smart-power ICs and RF amplifiers are also investigated.

Chapter 8. Lateral Power Transistors Combining Planar and Trench Gate Topologies

Progress in the development of novel LDMOS transistors in integrated circuits has also been made by a combination of planar and trench gate topologies. This effort is discussed as an example of novel device technologies in more details. Based on the trench gate topologies described in Chap. 7, the combination of existing planar LDMOS designs with trench gate topology appeals from its ease of integration into commercially available smart-power IC fabrication processes. In this light, the electrical characteristics under static and dynamic device operation are discussed. Due to the device design, avalanche ruggedness and limitations under operation as high-side switches are especially considered. The resulting FOMs are analyzed with respect to the implementation of these devices for high output power and high frequency operation.

Chapter 9. Lateral Power Transistors on Wide Bandgap Semiconductors

In this chapter, the state-of-the-art and progress on lateral silicon carbide power transistors of the 4H polytype is introduced. The impact of the physical properties on electrical characteristics is explained and the benefits regarding power electronic and radio-frequency applications are discussed. Technological limitations like limited channel mobility due to high interface state densities will be considered. Both work towards high frequency and high voltage operation are considered. Aspects regarding the introduction of smart power ICs on silicon carbide like the state-of-the-art in high temperature SiC logic will be investigated. Moreover, the high electron mobility transistor (HEMT) on gallium nitride is in the focus of this chapter. Due to the formation of a two dimensional electron gas it is highly suitable for high frequency operation. The performance of GaN-based HEMTs in its current state is described. Then, reliability issues like dynamic on-resistance and current collapse which hamper introduction of these devices in power electronic circuits are explained. Requirements regarding the epitaxial layers for fabrication of HEMTs and the available quality for GaN-on-Silicon devices are discussed. Using this technology, considerations regarding the implementation of GaN HEMTs on local GaN islands on silicon-based CMOS circuits for implementation of smart-power ICs and RF power amplifiers are presented.

Chapter 10. Summary of Integration Concepts for LDMOS Transistors

The final chapter of this textbook summarizes the integration concepts presented in Chap. 5 through Chap. 9. Comparison of integration densities and figures-of-merit represent a first methodology to evaluate these concepts with respect to applications requiring high efficiency or performance. Another methodology for comparison of device technologies is the comparison of process complexity and fabrication effort which is a key indicator for cost-sensitive applications. Using these comparisons, feasibility of emerging device technologies can be investigated with respect to different applications. The application-specific suitability is exemplified with the applications and circuits presented in Chaps. 2 and 3.

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